Chip Structure

  • Base Layer : P-TEOS*
  • Metal Layer : TiN / AI-0.5%Cu
  • Passivation Layer : HDP* / P-SiN

*TEOS : Tetraethoxysilane
*HDP : High Density Plasma


Specifications MB6020-0102JY
Wafer Size 8 inch
Wafer Thickness 725±25μm
Chip Size 3.0mm ♦
Pad Pitch 60/55/50/45/40/35/30/25/20μm 
Function Daisy Chain
Bump Size -
Bump Height -
Pad Size   

(57×110μm) (52×110μm) (47×110μm)
(42×110μm) (37×110μm) (32×110μm)
(27×110μm) (22×110μm) (17×110μm)

Passivation Opening (53×100μm) (48×100μm) (43×100μm)
(38×100μm) (33×100μm) (28×100μm)
(23×100μm) (18×100μm) (13×100μm)
Number of Pad

(40x4) (40x4) (38x4)
(38x4) (36x4) (34x4)
(30x4) (26x4) (18x4)

Number of Chip 3016 chips/wafer
Polyimide (Option) -
Evaluation KIT -
   ♦ Bottom Side