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Flip Chip describes the method of electrically connecting the die to the package carrier. The package carrier, either substrates or leadframe, then provides the connection from the die to the exterior of the package. The interconnection between die and carrier in flip chip packaging is made through a conductive bump that is placed directly on the die surface. The bumped die is then flipped over and placed face down, with the bumps connecting to the carrier. After the die is solderable, underfill is applied between the die and the substrates, around the solder bumps. The underfill is designed to contract the stress in the solder joints caused by the difference in thermal expansion between the silicon die and carrier.

Pac Tech offers a complete set of additional wafer level and backend services including: saw, dice, redistribution, repassivation, backsidelaser mark, backside coating, test die, and assembly. In addition, Pac Tech has the latest in metrology and analytical equipment to help in the development and production proceses, including: x-ray, shear, AOI, ICP, AA, probing, high speed ball pull, chemical analysis, etc…

See below for: Lead-Free Flip Chips

Flip Chip DesignFlip Chip Part Description SystemFlip Chip Detail
  • *Die count represents expected yield per wafer.
  • All die is packaged in waffle pack trays unless otherwise specified.
  • The potential multiple is the number of die repears on the wafer. With the wafer oriented flat down, a right hand coordinate system applies.
  • Die Size is from scribe line to center-to-center. Scribe width is 0.05mm Passicated. Each bump is electrically connected to one other bump and isolated from all others to facilitate electrical test.
  • Bump pitch is defined as center-to-center distance between passivation openings.
  • Bump height is defined as silicon surface to the top of the bump.
  • Bump diameter is defined as the maximum diameter.
  • UBM = Under Bump Metallurgy
  • Unbumped wafers are unavailable upon special request.
  • Metal Composition is 5μm Ni, .05μm Au
  • Die are packaged in Waffle Packs
  • Lead-Free parts available with (SAC305) 96.5%Sn/3.0%Ag/0.5%Cu alloy or (SAC405) 95.5%Sn/4.0%Ag/.05%Cu alloy
  • Other Alloys available upon request.

About Lead-Free Flip Chips

Flip Chips are used in evaluating assembly techniques, board continuity, temperature cycle life test evaluation, under­fill processes and other generic needs to be given to the appropriate ‑ux, under­ll, temperature profile, and pad ­finish for the assembly. Many companies are developing and qualifying alternative pad ­finishes as immersion Sn. Lead-Free Flip Chips address the need for environmentally conscious assemblies as well as Alpha particle tolerant packaging.

Lead-Free Die

  • All Flip Chips are available Lead-Free with (SAC) .%Sn/.%Ag/.%Cu or (SAC) .%Sn/.%Ag/.%Cu alloys.
  • When ordering Lead Free-Flip Chips add "SAC305" or "SAC405" to end of part number.

Flip Chip Die Layout

For kits see PCB310

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